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 P R E L I M I N A RY I N F O R M AT I O N
ICS554-01
LOW SKEW 1 TO 4 CLOCK BUFFER PECL IN, PECL OUT
Description
The ICS554-01 is a low skew clock buffer with a single complimentary PECL input to four PECL outputs. Part of ICS' Clock BlocksTM family, this is our lowest skew PECL clock buffer. For parts which do not require PECL inputs or outputs, see the ICS553 for a 1 to 4 low skew buffer, or the ICS552-02 for a 1 to 8 low skew buffer. For more than 8 outputs see the MK74CBxxx BuffaloTM series of clock drivers. ICS makes many non-PLL and PLL based low skew output devices as well as Zero Delay Buffers to synchronize clocks. Contact us for all of your clocking needs.
Features
* * * *
Outputs are skew matched to within 50ps Packaged in 16 pin TSSOP One PECL input to 4 PECL output clock drivers Operating Voltages of 3.3V to 5V
Block Diagram
VDD
62 62
IN IN
270
Q0
270
Q0 VDD
62 62
Q1 VDD
62 62 270 270
Q1
Q2
270 270
Q2 VDD
62 62
Q3 VDD
1.1k 0.01mF 270 270
Q3
RES
MDS 554-01 A In tegr ated C ir cu it S y st ems
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P R E L I M I N A RY I N FO R M ATI O N
ICS554-01
LOW SKEW 1 TO 4 CLOCK BUFFER PECL IN, PECL OUT
Pin Assignment
NC VDD Q0 Q0 Q1 Q1 GND IN 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 RES VDD Q3 Q3 Q2 Q2 GND IN
1 6 P in T S S O P
Pin Descriptions
Pin Number
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
Pin Name
NC VDD Q0 Q0 Q1 Q1 GND IN IN GND Q2 Q2 Q3 Q3 VDD RES
Pin Type
Power Output Output Output Output Power Input Input Power Output Output Output Output Power Input No Connect.
Pin Description
Connect to +2.5 V, +3.3V or +5.0V. Must be the same as pin 15. Clock Output Q0 Clock Output Q0 Clock Output Q1 Clock Output Q1 Ground PECL Clock Input Complementary PECL Clock Input Ground Clock Output Q2 Clock Output Q2 Clock Output Q3 Clock Output Q3 Connect to +2.5V, +3.3V or +5.0V. Must be the same as pin 2 Bias Resistor Input.
MDS 554-01 A Int egrat ed C ircuit Syste ms
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P R E L I M I N A RY I N FO R M ATI O N
ICS554-01
LOW SKEW 1 TO 4 CLOCK BUFFER PECL IN, PECL OUT
External Components
The ICS554-01 requires a decoupling capacitor of 0.01F to be connected between VDD on pin 2 and GND on pin 7, as well as between VDD on pin 15 and GND on pin 10. These decoupling capacitors should be placed as close to the device as possible. A 0.01F capacitor must be placed between the RES (pin 16) and Ground, also, a resistor must be connected between the RES (pin 16) and VDD. Another eight resistors are needed for the PECL outputs as shown on the block diagram on page 1. Suggested values of these resistors are shown in the Block Diagram, but they can be varied to change the differential pair output swing, and the DC level. Refer to Application Note, MAN09. To achieve the low output skews that the ICS554-01 is capable of, careful attention must be paid to board layout. Essentially, all 8 outputs must have identical terminations, identical loads, and identical trace geometries. If they do not, the output skew will be degraded. For example, using a 30 series termination on one output (with 33 on the others) will cause at least 15ps of skew.
Absolute Maximum Ratings
Stresses above the ratings listed below can cause permanent damage to the ICS554-01. These ratings, which are standard values for ICS commercially rated parts, are stress ratings only. Functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can affect product reliability. Electrical parameters are guaranteed only over the recommended operating temperature range.
Item
Supply Voltage, VDD All Inputs and Outputs Ambient Operating Temperature Storage Temperature Junction Temperature Soldering Temperature 7V
Rating
-0.5V to VDD+0.5V 0 to +70C -65 to +150C 175C 260C
Recommended Operation Conditions
Parameter
Ambient Operating Temperature Power Supply Voltage (measured in respect to GND)
Min.
0 +3.15
Typ.
-
Max.
+70 +5.25
Units
C V
MDS 554-01 A Int egrat ed C ircuit Syste ms
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P R E L I M I N A RY I N FO R M ATI O N
ICS554-01
LOW SKEW 1 TO 4 CLOCK BUFFER PECL IN, PECL OUT
DC Electrical Characteristics
VDD=3.3V 5%, Ambient temperature 0 to +70C, unless stated otherwise
Parameter
Operating Voltage Peak to Peak Input Voltage Input Common Mode Range Input Common Mode Range Input High Voltage, OE Input Low Voltage, OE Output High Voltage Output Low Voltage Operating Supply Current Short Circuit Current, 2.5V Short Circuit Current, 3.3V Short Circuit Current, 5V
Symbol
VDD IN IN IN VIH VIL VOH VOL IDD IOS IOS IOS
Conditions
Min.
3.15 0.3
Typ.
Max.
5.25 1.0 VDD-0.6 VDD-0.6
Units
V V V V V V V V mA mA mA mA
VDD=3.3V VDD=5V - - Note 1 Note 1 No load, 135 MHz
VDD-2.0 VDD-3.7 2 - VDD-1.2 - - 67 40 50 60 - -
VDD 0.4 VDD-2.0
Notes: 1. VOH and VOL can be set by the external resistor values on the PECL outputs. 2. IDD includes the current through the external resistors which can be modified.
AC Electrical Characteristics
VDD = 3.3V 5%, Ambient Temperature 0 to +70 C, unless stated otherwise
Parameter
Input Frequency Propagation Delay (VDD=3.3V) Propagation Delay (VDD=5V) Output to output skew. Crossing point of pair
Symbol
Conditions
Min.
0
Typ.
4 3 0
Max. Units
200 MHz ns ns 50 ps
MDS 554-01 A Int egrat ed C ircuit Syste ms
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Revision 031901 t el (40 8) 295 -9800
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P R E L I M I N A RY I N FO R M ATI O N
ICS554-01
LOW SKEW 1 TO 4 CLOCK BUFFER PECL IN, PECL OUT
Package Outline and Package Dimensions (16 pin TSSOP, 173 Mil. Narrow Body)
Package dimensions are kept current with JEDEC Publication No. 95
Millimeters Symbol Min Max
Inches Min Max
A a b c
-0.05 0.19 0.09 4.90 4.30
1.20 0.15 0.30 0.20 5.10 4.50
-0.002 0.007 0.0035 0.193 0.169
0.047 0.006 0.012 0.008 0.201 0.177
E
D
H
E e H L
0.65 Basic 6.40 Basic 0.45 0.75
0.0256 Basic 0.252 Basic 0.018 0.030
D
a e b
c L
A
Ordering Information
Part / Order Number
ICS554G-01 ICS554G-01T
Marking (both)
ICS (top line) 554G-01 (2nd line)
Shipping packaging
Tubes Tape and Reel
Package
16 pin TSSOP 16 pin TSSOP
Temperature
0 to +70 C 0 to +70 C
While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems (ICS) assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or critical medical instruments.
MDS 554-01 A Int egrat ed C ircuit Syste ms
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525 R ace S tr eet, San Jose, CA 95126
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Revision 031901 t el (40 8) 295 -9800
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